Implementation of IQ-Math based linear activation functions on FPGA

Abstract

Nowadays, Artificial Neural Networks (ANN), which is one of the widely used fields of artificial intelligence, has been commonly used in many areas including regression, estimation, decision making, classification, image and voice recognition, nonlinear signal processing and chaotic oscillator design. ANN, implemented in two different ways as software-based and hardware-based, has features such as parallel signal processing and distributed information processing. Therefore, ANN is known as a structure that includes very intensive mathematical operations. Hardware-based ANN applications can be implemented using many different platforms. FPGA (Field Programmable Gate Array) chips, as one of these platforms, have parallel processing capacity with high operating speed. In this study, a Linear Activation Functions Library has been created by implementing 6 different linear activation functions on FPGA for real time ANN applications. The designs have been coded using VHDL (Very High Speed Integrated Circuit Hardware Description Language) in accordance with 32-bit (16I-16Q) IQ-Math number standard. All designs have been tested using Xilinx ISE Design Suite program. After the test phase, the implementations have been synthesized for Xilinx Kintex-7 FPGA chip. The chip statistics and performance analyses obtained from FPGA-based activation functions have been presented.