Implementation of Dormand-Prince based chaotic oscillator designs in different IQ-Math number standards on FPGA

Abstract

Chaos and chaotic systems, one of the most important work areas in recent years, are used in areas such as cryptology and secure communication, industrial control, artificial neural networks, random number generators and image processing. The most basic structure used in these studies is a chaotic oscillator design that produces a chaotic signal. Chaotic oscillators are expressed by using differential equations. Numerical algorithms such as Euler, Heun, fourth order Runge-Kutta-4 (RK4), fifth order RK5-Butcher and Dormand-Prince are used for solving these differential equations. When the current literature is searched, chaotic oscillator designs are found by Euler, Heun, RK4 and RK5- Butcher method. However, FPGA-based chaotic oscillator design studies have not been found using the Dormand-Prince method, which produces more accurate solutions than other methods. In this work, self-excited attractor chaotic system was first designed in 16I-16Q, 14I-14Q, 12I-12Q, 10I_10Q, 8I-8Q IQ-Math number standards on FPGA using Dormand-Prince numerical algorithm and encoded in VHDL language. Xilinx ISE Design Tools were used to design the chaotic system. The design was synthesized and tested for the Xilinx Virtex-6 FPGA chip. Using the Xilinx ISE design tool, the chip statistics and maximum operating frequency obtained after the "Route-Place" operation are presented. In future work, safe communication and real random number generator applications can be realized by using the Dormand-Prince based oscillator design presented in this study.